Overview and Concepts of DRP-AI

The RZ/V2H DRP-AI Driver enables use of the DRP-AI (Dynamically Reconfigurable Processor - AI Matrix Arithmetic Circuit) hardware accelerator on the RZ/V2H platform.

This driver facilitates efficient execution of AI inference tasks by offloading computations to the DRP-AI, thereby improving performance, reducing CPU load, and delivering high power efficiency.

The DRP-AI device driver provides an interface for easily handling AI inference execution on the DRP-AI, so no detailed hardware knowledge is required from the user.

What is Dynamically Reconfigurable Processor (DRP)?

DRP is a hardware IP (Intellectual Property) block that can dynamically change its hardware configuration, including its arithmetic logic circuits.

Its main advantages are reduced silicon area and power consumption while maintaining high performance.

Dynamic reconfiguration enables the arithmetic circuit configuration to be changed during execution.

The following image shows an example of dynamic reconfiguration:

What is DRP-AI?

DRP-AI is a specialized version of DRP designed specifically for AI (Artificial Intelligence) processing tasks.

It combines DRP and AI-MAC (AI Matrix Arithmetic Circuit) to accelerate AI inference tasks efficiently.

DRP-AI Driver Architecture

The DRP-AI Driver architecture includes the following elements:

Buffers for reusing input data
Switches to avoid zero-data processing
A controller to optimize the operation flow through scheduling

DRP-AI Driver Execution Flow

The DRP-AI Driver handles the following tasks to execute AI inference on the DRP-AI:

Pre-processing: Prepares input data for DRP-AI processing, including format conversion, image cropping, and normalization.
Inference execution: Manages execution of the AI model on the DRP-AI hardware.
Post-processing: Processes output data from DRP-AI to obtain the final inference results.